What is the UART communication protocol?

UART, as one of the asynchronous serial communication protocols, works by transmitting each character of the transmitted data one by one. The meaning of each bit is as follows:

Start bit: A logical "0" is emitted first, indicating the start of character transmission.

Data bit: immediately after the start bit. The number of data bits can be 4, 5, 6, 7, 8, etc., which constitute a character. Usually ASCII code is used. Transmission starts from the lowest bit and is positioned by the clock.

Parity bit: The data bit is added to this bit to make the number of "1" bits even (even parity) or odd (odd parity) to check the correctness of data transmission.

Stop bit: It is the end mark of a character data. It can be 1 bit, 1.5 bits, or 2 bits high. Since the data is timed on the transmission line and each device has its own clock, it is likely that there is a small desynchronization between the two devices during the communication. Therefore, the stop bit not only indicates the end of the transmission, but also provides the computer with the opportunity to correct the clock synchronization. The more bits applied to the stop bit, the greater the tolerance for different clock synchronization, but also the slower the data transfer rate.

Idle bit: In the logical "1" state, it means that there is no data transmission on the current line.

The working principle of UART serial communication

(1) Sending data process:

Idle state, the line is at high level; when the transmission command is received, pull down a data bit of the line time T, then the data is sent in order from low to high, after the data is sent, then send the parity bit and stop bit, a frame of data transmission is completed.

(2) Data reception process:

When the falling edge (high level becomes low level) of the line is detected, it means there is data transmission on the line, and the data is received from low to high bit according to the agreed baud rate.

Since UART is asynchronous transmission, there is no transmission synchronous clock. To ensure the correctness of the data, UART uses a clock with 16 times the data baud rate for sampling. There are 16 clock samples for each data, and the middle sample value is taken to ensure that the sampling will not slip code or mis? Generally the number of data bits in one frame of UART is 8, so that even if there is one clock error for each data, the receiver can still sample the data correctly.

UART's receive data timing is as follows: when the falling edge of data is detected, it indicates that there is data on the line for transmission, which is when the counter CNT starts counting. When the counter is 24=16+8, the sampled value is the 0th bit of data; when the counter value is 40, the sampled value is the first bit of data, and so on, for the next 6 data samples. If parity check is required, when the counter value is 152, the sampled value is the parity bit; when the counter value is 168, the sampled value is "1" to indicate the stop bit and the data reception is completed.