I. Interference Source

    In the system test phase of LCD module, anti-interference test is an important item, whether using professional instruments test or whole machine long time operation test. Interference is a common and very difficult problem for the whole system. When the system circuit is interfered with, the power line or signal line will produce a certain frequency, a certain amplitude of the interference wave. This interference wave is applied to the LCD module's interface line end, it is bound to bring undesired display effect.

    The LCD module is a pure input type component for the whole system, or passive type component. The LCD module itself has no error correction function, that is, the LCD module can receive any signal that meets the operation timing relationship without the ability to determine whether it is right or wrong. Wrong signal and wrong data will produce wrong control command or wrong display pattern, resulting in wrong display effect.

    The first job to eliminate interference is to find the source of interference and the location where the interference affects, and then use effective methods to eliminate, weaken or shield, and remedy.

II. Anti-interference Measures

   This paper gives some constructive ideas to solve the common display problems of LCD module in the system whole machine anti-interference test or copy operation, but the effective method needs to be explored and verified in the actual test and operation.

    1. The whole system in the operation of the test or anti-interference test, the LCD module does not display, adjust the contrast is not responsive. This phenomenon is because during the work of the machine, the LCD module power line or / RESE7 signal line is electromagnetic interference, resulting in interference pulses, resulting in the LCD module is reset. The result of its reset is to initialize the module's internal registers, while turning off the display.

   The Recommended Solution:

   ① If the interference is applied on the power line, it is recommended to parallel a voltage regulator capacitor (10μF) and a filter capacitor (0.1μF or 0.01μF) between VDD and VSS of the power line closest to the LCD module position.

   ② If interference is applied to the /RESET signal line, it is recommended that a filter capacitor be added between the /RESET signal line and VSS at the position closest to the LCD module, with a capacitance of 0.1μF or O.01μF.

    The selection of the above capacitor value needs to be based on the actual test results.

  2. When the whole system is running or conducting anti-interference test, the screen generates wrong characters or messy dots (data error). Or screen panning, upside down and other phenomena. Sometimes it is impossible to recover, only clear the screen to rewrite, or even need to re-power, initialize the register to recover.

    This phenomenon is mostly due to interference applied to control signals such as / WR signal, / RD signal or E signal or / CS signal. Interference signals are more likely to generate wrong waveforms on these signal lines, making the register parameters to be mistakenly modified, display units to be mistakenly written data, etc.

    When the whole system is running, most programs only perform data writing operations to the local display area, without writing operations to other addresses or without repeatedly setting some registers that are only set at initialization, so the above phenomenon occurs.

    Assuming that the interference signal is applied from space to the transmission line between MPU and LCD module, it is suggested that:

    ① Use magnetic ring or tinfoil or copper thin to do the shielding of the transmission line;

    ② Change the direction of the transmission line to avoid the interfering environment;

    ③ Shorten the length of the transmission line;

    ④ In the key signal lines, parallel interface mode: to first / WR (/ RD) signal or E signal, then / CS signal, then RS signal in the order of adding a small capacitor of 100 to 300pF to ground (VSS). Serial interface mode: add a small capacitor of 100 to 300pF to ground (VSS) in the order of SCLK, then SDA, then RSRESET.