CLK clock signal: a shift pulse provided to the shift register, each pulse will cause data to shift in or out of one bit. The data on the data port must be coordinated with the clock signal to transmit data normally. The frequency of the data signal must be 1/2 times the frequency of the clock signal. In any case, when the clock signal is abnormal, the whole LCD display screen will be disordered.

STB latch signal: The data in the shift register is sent to the latch, and the data content is displayed on the LCD through the driving circuit. But because the drive circuit is controlled by the EN enable signal, the premise of its lighting must be the enable state. The latch signal also needs to be coordinated with the clock signal to display a complete image. In any case, when there is an abnormality in the latch signal, the whole display of the LCD display will be disordered.

EN enable signal: the entire screen brightness control signal, also used for display blanking. Just adjust its duty cycle to control the change in brightness. When the enable signal is abnormal, the whole screen will appear unlit, dim, or smeared.

Data signal: Provides the data needed to display the image. It must be coordinated with the clock signal to transfer data to any display point. Generally, the red, green, and blue data signals are separated in the LCD display. If a data signal is shorted to the positive or negative electrode, the corresponding color will appear completely or not. The display is uncertain.

ABCD line signal: It only exists in dynamic scanning display. ABCD is actually a binary number and A is the least significant bit. If you use ABCD to represent the maximum control range of 16 lines (1111), you only need the AB signal in 1/4 scan Yes, because the range of the AB signal is 4 lines (11). When the line control signal is abnormal, the LCD display will display misalignment, highlighting or image overlap.